AMD Artix 7

Non-hardware verified power tree for AMD (Xilinx) Artix 7 FPGA designs.

Block Diagram

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Product Number

Description

Product Family

Synchronous buck regulator Enable / Power Good. VIN from 4.5V to 18V up to 35A load. 5x6mm PQFN37.

Synchronous buck regulator Enable / Power Good, PMBUS 1.3.1 Compatible. VIN from 4.5V to 18V up to 15A load. 5x7mm QFN34.

Synchronous buck regulator w/ Enable / Power Good. VIN from 2.9V to 5.5V up to 6A load. VOUT from 0.6V to 0.84 X VIN3x3mm QFN16.

500mA LDO, 0.6 to 5V Adjustable VOUT, with Enable / Power Good. WDFNW6_2x2mm

500mA LDO, 1.8V VOUT, with Enable / Power Good. WDFNW6_2x2mm

Synchronous buck regulator EN and PG. VIN from 2.9V to 5.5V up to 3A load. 3x3mm QFN16

Synchronous buck regulator EN and PG. VIN from 2.3V to 5.5V, Vout from 0.3V to 2V, up to 3A load. 1.36x0.432mm WLCSP12

1A LDO, 1.2V VOUT, with Enable / Power Good WDFNW6_2x2mm

Source/sink Double Data Rate (DDR1, 2, 3) 3A termination regulator.