FLASH_IF_CTRL
Bit Field |
Read/Write |
Field Name |
Description |
---|---|---|---|
16 |
RW |
NOT_LOAD_AUTO |
Do not automatically load the configuration registers and the patch information from MNVR sector after the command WAKEUP is completed. |
12 |
RW |
VREAD1_MODE |
Control VREAD1: Read data after erase with more stringent condition than normal read. Changing this bit will execute the CMD_SET_VREAD1 or CMD_UNSET_VREAD1 command. |
10 |
RW |
RECALL |
Set the recall pins mode during CMD_READ. Changing this bit will execute the CMD_SET_RECALL or CMD_UNSET_RECALL command. |
9:8 |
RW |
RETRY |
Configures the erase retry iteration. This impacts the Flash endurance time. Also used by Flash programming. |
0 |
RW |
LP_MODE |
Set the low power mode. Changing this bit will execute the CMD_SET_LOW_POWER or CMD_UNSET_LOW_POWER command. |
Bit Field |
Field Name |
Value Symbol |
Value Description |
Hex Value |
---|---|---|---|---|
16 |
NOT_LOAD_AUTO |
FLASH_LOAD_AUTO_ENABLE |
No automatic load done after the WAKEUP command |
0x0* |
|
|
FLASH_LOAD_AUTO_DISABLE |
The CMD_WAKEUP includes the loading of internal registers and patch information. |
0x1 |
12 |
VREAD1_MODE |
FLASH_VREAD1_DISABLE |
After erase, read data with a normal condition |
0x0* |
|
|
FLASH_VREAD1_ENABLE |
After erase, read data with a more stringent condition |
0x1 |
10 |
RECALL |
FLASH_RECALL_DISABLE |
RECALL pin low during read command |
0x0* |
|
|
FLASH_RECALL_ENABLE |
RECALL pin high during read command |
0x1 |
9:8 |
RETRY |
FLASH_RETRY_1 |
for 1st erase pulse |
0x0* |
|
|
FLASH_RETRY_2 |
for 2nd erase pulse |
0x1 |
|
|
FLASH_RETRY_3 |
for 3rd erase pulse |
0x2 |
|
|
FLASH_RETRY_4 |
for 4th erase pulse or required during programming |
0x3 |
0 |
LP_MODE |
FLASH_LOW_POWER_DISABLE |
Disable the Flash low power mode |
0x0* |
|
|
FLASH_LOW_POWER_ENABLE |
Enable the Flash low power mode |
0x1 |