I2C_STATUS

Bit Field

Read/Write

Field Name

Description

26

R

STOP_OR_REPEATED_START_DETECTED

Indicate if STOP_DETECTED or REPEATED_START_DETECTED bit is set

25

R

REPEATED_START_DETECTED

Indicate if an I2C repeated start has been detected during an active transaction in slave mode

22

R

BUS_ERROR

Bus error status bit

21

R

BUSY

Indicate that the reception or transmission of the data is ongoing

20

R

START_PENDING

Master frame start pending status bit

19

R

MASTER_MODE

Master mode status bit

18

R

STOP_DETECTED

Indicate if an I2C stop bit has been detected

17

R

DATA_EVENT

Indicate that I2C interface either needs data to transmit or has received data

16

R

TX_REQ

Indicate that a TX data can be written

15

R

RX_REQ

Indicate that a RX data can be read

14

R

CLK_STRETCH

Clock stretching flag

13

R

LINE_FREE

Line free flag

12

R

ADDR_DATA

Address / Data byte

11

R

READ_WRITE

Read / Write frame

10

R

GEN_CALL

General call flag

9

R

ACK

Acknowledge status

8

R

OVERRUN

Indicate that an overrun has occurred when receiving data

4

W

TX_REQ_SET

Set TX_REQ status flag

3

W

REPEATED_START_DETECTED_CLEAR

Clear REPEATED_START_DETECTED status flag

2

W

STOP_DETECTED_CLEAR

Clear STOP_DETECTED status flag

1

W

BUS_ERROR_CLEAR

Clear BUS_ERROR status flag

0

W

OVERRUN_CLEAR

Clear OVERRUN status flag

Bit Field

Field Name

Value Symbol

Value Description

Hex Value

26

STOP_OR_REPEATED_START_DETECTED

I2C_STOP_NOR_REPEATED_START_DETECTED

Neither STOP_DETECTED nor REPEATED_START_DETECTED bits are set

0x0*

I2C_STOP_OR_REPEATED_START_DETECTED

STOP_DETECTED or REPEATED_START_DETECTED bit is set

0x1

25

REPEATED_START_DETECTED

I2C_NO_REPEATED_START_DETECTED

No repeated start condition has been detected on the I2C bus during an active transaction in slave mode

0x0*

I2C_REPEATED_START_DETECTED

A repeated start condition has been detected on the I2C bus during an active transaction in slave mode

0x1

22

BUS_ERROR

I2C_NO_BUS_ERROR

No I2C bus error has occurred

0x0*

I2C_BUS_ERROR

An I2C bus error has occurred

0x1

21

BUSY

I2C_IDLE

I2C interface is idle

0x0*

I2C_BUSY

I2C interface is busy

0x1

20

START_PENDING

I2C_START_NOT_PENDING

No pending master start frame

0x0*

I2C_START_PENDING

A master frame is pending to start (bit is set when I2C_ADDR_START is written)

0x1

19

MASTER_MODE

I2C_MASTER_INACTIVE

I2C interface is not operating in master mode

0x0*

I2C_MASTER_ACTIVE

I2C interface is operating in master mode

0x1

18

STOP_DETECTED

I2C_NO_STOP_DETECTED

No stop condition has been detected on the I2C bus

0x0*

I2C_STOP_DETECTED

A stop condition has been detected on the I2C bus

0x1

17

DATA_EVENT

I2C_NON_DATA_EVENT

No I2C data is needed or available

0x0*

I2C_DATA_EVENT

I2C data is needed or is available

0x1

16

TX_REQ

I2C_TX_NO_REQ

I2C TX data has already been written

0x0

I2C_TX_REQ

I2C TX data can be written

0x1*

15

RX_REQ

I2C_RX_NO_REQ

No new I2C RX data available

0x0*

I2C_RX_REQ

New I2C RX data available

0x1

14

CLK_STRETCH

I2C_CLK_NOT_STRETCHED

I2C interface is currently not clock streching

0x0*

I2C_CLK_STRETCHED

I2C interface is currently clock streching

0x1

13

LINE_FREE

I2C_BUS_BUSY

I2C transaction ongoing

0x0

I2C_BUS_FREE

I2C bus is free

0x1*

12

ADDR_DATA

I2C_DATA_IS_DATA

The I2C data register holds data

0x0*

I2C_DATA_IS_ADDR

The I2C data register holds an address

0x1

11

READ_WRITE

I2C_IS_WRITE

The current I2C transfer is a write

0x0*

I2C_IS_READ

The current I2C transfer is a read

0x1

10

GEN_CALL

I2C_ADDR_OTHER

The address used for the current I2C transfer is not the general call address

0x0*

I2C_ADDR_GEN_CALL

The address used for the current I2C transfer is the general call address

0x1

9

ACK

I2C_HAS_ACK

Indicate that the last I2C byte was acknowledged

0x0*

I2C_HAS_NACK

Indicate that the last I2C byte was not acknowledged

0x1

8

OVERRUN

I2C_OVERRUN_FALSE

No I2C input overrun detected

0x0*

I2C_OVERRUN_TRUE

I2C input overrun detected

0x1

4

TX_REQ_SET

I2C_TX_REQ_SET

Set the TX_REQ status flag

0x1

3

REPEATED_START_DETECTED_CLEAR

I2C_REPEATED_START_DETECTED_CLEAR

Clear the REPEATED_START_DETECTED status flag

0x1

2

STOP_DETECTED_CLEAR

I2C_STOP_DETECTED_CLEAR

Clear the STOP_DETECTED status flag

0x1

1

BUS_ERROR_CLEAR

I2C_BUS_ERROR_CLEAR

Clear the BUS_ERROR status flag

0x1

0

OVERRUN_CLEAR

I2C_OVERRUN_CLEAR

Clear the OVERRUN status flag

0x1