LSAD_INT_ENABLE
Bit Field |
Read/Write |
Field Name |
Description |
---|---|---|---|
3:1 |
RW |
LSAD_INT_CH_NUM |
Channel number triggering the LSAD interrupt |
0 |
RW |
LSAD_INT_ENABLE |
The LSAD new sample ready interrupt mask |
Bit Field |
Field Name |
Value Symbol |
Value Description |
Hex Value |
---|---|---|---|---|
3:1 |
LSAD_INT_CH_NUM |
LSAD_INT_CH0 |
The LSAD interrupt is triggered when the LSAD_DATA_CH0 register is updated |
0x0* |
|
|
LSAD_INT_CH1 |
The LSAD interrupt is triggered when the LSAD_DATA_CH1 register is updated |
0x1 |
|
|
LSAD_INT_CH2 |
The LSAD interrupt is triggered when the LSAD_DATA_CH2 register is updated |
0x2 |
|
|
LSAD_INT_CH3 |
The LSAD interrupt is triggered when the LSAD_DATA_CH3 register is updated |
0x3 |
|
|
LSAD_INT_CH4 |
The LSAD interrupt is triggered when the LSAD_DATA_CH4 register is updated |
0x4 |
|
|
LSAD_INT_CH5 |
The LSAD interrupt is triggered when the LSAD_DATA_CH5 register is updated |
0x5 |
|
|
LSAD_INT_CH6 |
The LSAD interrupt is triggered when the LSAD_DATA_CH6 register is updated |
0x6 |
|
|
LSAD_INT_CH7 |
The LSAD interrupt is triggered when the LSAD_DATA_CH7 register is updated |
0x7 |
0 |
LSAD_INT_ENABLE |
LSAD_INT_DIS |
This source cannot set an interrupt |
0x0* |
|
|
LSAD_INT_EN |
This source can set the LSAD interrupt line |
0x1 |