Resets

The RSL15 SoC contains a variety of reset sources that can be used to reset the entire RSL15 system, or a set of its system components. A system reset causes the system to restart and status bits to be set for each of the relevant reset causes. These reset status bits exist in the ACS_RESET_STATUS and RESET_DIG_STATUS registers. The reset bits and their encoding can be seen in the "Reset Sources and Flag Decoding" figure, which also shows the ordering of reset flags. These flags remain set until cleared by writing to their associated CLEAR flags.

IMPORTANT: To clear the status bits that indicate the source of a reset, the RESET_DIG_STATUS register must be cleared before the ACS_RESET_STATUS register.

We recommend clearing all reset status flags at the start of application execution (after the reset source has been determined), to allow future executions to determine the cause of a reset or resets.

The NRESET pad can be used to reset the device. This pad is connected by an internal pullup resistor to VDDO. Therefore, we recommend that VDDO is powered in all your applications. Otherwise the NRESET pin floats, and unexpected behavior of the device can result.

Figure: Reset Sources and Flag Decoding

IMPORTANT: For best practices in error, fault, and watchdog interrupt handling see Diagnostic Strategies from the RSL15 Developer's Guide.