LSAD
The low speed analog-to-digital converters (LSADs) provide an analog-to-digital conversion of up to eight differential combinations of four internal signals and four external signals. Each conversion is a differential measurement, with a configurable resolution for the converter of 8 or 14 bits of precision and restrictions based on sampling frequency. The output code is always 14 bits. For example, the highest frequency divisor (0x08, SLOWCLK/20) results in 8-bit resolution, and the lowest speed (0x7: SLOWCLK/6400) has the full 14 bits of resolution. The LSAD has a conversion range from 0 V to 2 V.
LSAD Input Configuration
The purpose of the LSADs is to sample analog signals that are relevant to the user’s application use cases—for example, the voltage associated with a potentiometer-based volume control, or a supply voltage for battery monitoring applications using the Bluetooth Low Energy battery service (BAS). The signals measured by the LSAD block are configured using the NEG_INPUT_SEL and POS_INPUT_SEL bit fields from the LSAD_INPUT_SEL register set. The negative and positive signals used for each differential measurement are selected from:
All DIOs
For more information about GPIO configuration for LSADs, see Overview.
AOUT
The analog test output signal. The signal provided to AOUT can be configured using the ACS_AOUT_CTRL_TEST_AOUT bit field from the ACS_AOUT_CTRL register, which allows the LSADs to additionally measure a number of other internal power supply outputs and status flags with the AOUT_* and DOUT_* fields, respectively, of the ACS_AOUT_CTRL register. For more information about the internal power supplies, see Power Supply Overview.
VBAT
Direct measurement of the battery supply voltage. Setting this bit divides the battery supply voltage that the LSAD measures by 2. This allows the battery supply voltage to always stay in the measurable range of the LSAD.
CAUTION: The LSAD measurable input voltage range is 0 V to 2 V. Exceeding this voltage range can damage the device (see the datasheet ABSOLUTE MAXIMUM RATINGS table for details). Therefore, when measuring a GPIO, take care not to exceed the absolute maximum voltage on the selected GPIO. The internal VBAT signal is protected by a voltage divider, allowing safe measurement of all valid VBAT ranges. |
Internal Temperature Sensor
Allows measurement of the output of the internal temperature sensor, allowing a simple way to measure internal device temperature.
IMPORTANT: There are gain and offset values available in NVR7 that are intended for use with the LSAD. There is a separate set of gain and offset values in NVR7 for measuring the internal temperature sensor using the LSADs. Usage of gain and offset values from NVR7 is discussed below LSAD Output Data. |
GND
Allows measurement of the ground of the device. This input is most often used as a negative input, in order to measure a positive voltage. If both positive and negative inputs are connected to ground, automatic offset compensation is enabled and automatically measured and applied by the device. The offset value measured is placed into LSAD_OFFSET.
LSAD Sampling Configuration
The LSAD signals are sampled at a sampling rate derived from SLOWCLK, and configured using the LSAD_CFG_FREQ bit field from the LSAD_CFG register. Configuration of SLOWCLK is described in Slow Clock (SLOWCLK), with SLOWCLK typically initialized to 1 MHz. LSAD measurements using this divided clock can be configured for two sampling modes. Low-Frequency Mode SLOWCLK is first prescaled by a fixed factor of 10, with a maximum sampling rate of 5 kHz. LSAD measurement results have a resolution of 14 bits. High-Frequency Mode SLOWCLK is prescaled by a factor of 2, with sampling rates of up to 25 kHz where LSAD measurement results have a resolution of 14 bits, or up to 50 kHz where LSAD measurement results have a resolution of 8 bits. In addition to selecting the sampling mode, the LSAD_CFG_FREQ bit field defines the frequency at which measurements are taken, and the native voltage range of measurements. Lower reference measurement rates provide a larger native voltage range, and in the case of High-Frequency Mode, provide a higher resolution LSAD measurement. (See the "LSAD Sampling Configuration Settings" table.)
The LSAD block samples data at the specified frequency, with data samples read from all eight channels in Normal Mode, and from only one channel sampled in continuous mode. This results in a lower effective sample rate for Normal Mode operations.
• | If the LSAD block is configured in Normal Mode, each LSAD channel is sampled in sequence and an LSAD interrupt occurs once every eighth sample. The channel number that triggers the interrupt (or phase offset) can be defined as part of the LSAD_INT_CH_NUM bit field in the LSAD_INT_ENABLE register. Between each interrupt, the data value for each LSAD channel is updated to a new, valid sample. |
• | If the LSAD is configured in Continuous Mode, only one LSAD channel is sampled and an interrupt occurs every sample. The sampled channel is defined in the LSAD_INT_CH_NUM bit field as part of the LSAD_INT_ENABLE register. |
The "LSAD Sampling Configuration Settings" table shows the LSAD sampling configuration settings.
NOTE: For a typical SLOWCLK frequency of 1.00 MHz, the LSAD samples all eight channels in Normal mode at a configurable rate between 6.25 kHz and 19.5 Hz.
LSAD Output Data
The converted output from the most recent conversion of each channel can be found in the LSAD_DATA_TRIM_CH* and LSAD_DATA_AUDIO_CH* registers. Data read from both registers that refer to each channel are equivalent, and only the interpretation of the underlying measurement is different.
LSAD_DATA_TRIM_CH*
The output data value from the LSAD is represented as trimmer data, providing a 14-bit unsigned value scaled between 0x000 and 0x3FFF to represent a signal in the range from 0 to 2.0 V. Any measurement outside of the range from 0 to 2.0 V is saturated.
LSAD_DATA_AUDIO_CH*
The output data value from the LSAD is represented as audio data, providing a 14-bit signed value scaled between 0xFFFFE000 and 0x00001FFF to represent a signal in the range from 0 to 2.0 V. Measurements outside of the range from 0 to 2.0 V can extend this range if the LSAD sampling configuration extends the range of measured values.
For improved accuracy in the LSAD data, the RSL15 SoC provides an offset correction factor in the LSAD_OFFSET register that automatically applies a compensation value to the measured LSAD data. This value is normally the difference between the expected and measured LSAD output when the input is 0 V. The value of this register is automatically updated with a measured compensation value that corrects the measurements when an LSAD channel selects GND as the source for both the positive and negative sources for the channel. If no channels are configured in this way, the offset register can be configured to provide any desired compensation (including selecting no compensation by setting this register to 0x00000000). If you are using LSAD gain and offset values from NVR7, we recommend that you disable automatic offset compensation and apply the gain and offset settings in firmware.
Voltage Monitoring
The LSAD block additionally provides resources that can be used to monitor any voltage measured by the LSAD, to provide an alarm if that voltage drops below a certain threshold. Typically, this can be used to monitor the power supply through VBAT/2 (useful if the system is supplied directly from VBAT), or VCC (useful if the system is being supplied through the DC-DC converter). From the information obtained from these supplies, you can detect when the battery is nearing the end of its life.
The supply threshold level can be defined between 0 V and 2 V, using 256 steps of approximately 7.8 mV. This is defined in the LSAD_MONITOR_CFG_MONITOR_THRESHOLD bit field. Select the LSAD channel as the source to monitor by setting the LSAD_MONITOR_CFG_MONITOR_SRC bit. Both of these values are part of the LSAD_MONITOR_CFG register.
When the monitored voltage is measured as being below the specified threshold, the value of the LSAD_MONITOR_COUNT_VAL register is incremented. This counter register is reset when read. The value of this register is compared with the value stored in the LSAD_MONITOR_CFG_ALARM_COUNT_VALUE bit field from the LSAD_MONITOR_CFG register, and if the counter value ever exceeds the alarm value, an alarm is generated.
The status of the monitor and the LSAD module can be read or reset from the LSAD_MONITOR_STATUS register. The status of the monitor alarm, data overruns, and new LSAD sample data availability is all ready to be read and reset.
LSAD and Voltage Monitoring Interrupt
A single interrupt line is shared between the LSAD and the voltage monitoring circuitry. This interrupt can be independently configured to trigger when one or both of the following conditions are met:
• | Triggering when a specified LSAD channel is sampled. To enable this trigger condition, use the LSAD_INT_ENABLE bit from the LSAD_INT_ENABLE register. To specify the LSAD channel, use the LSAD_INT_CH_NUM bit field from this same register. |
• | Triggering when a voltage monitor alarm occurs. To enable this trigger condition, set the ALARM_COUNT_VALUE bit field from the LSAD_MONITOR_CFG register. |
NOTE: All three flags in the LSAD_MONITOR_STATUS register are sticky, and each must be separately cleared by setting the appropriate LSAD_MONITOR_STATUS_*_CLEAR bit from the LSAD_MONITOR_STATUS register.
Using LSAD calibration data
Using the LSAD calibration data available in NVR7 is a straightforward process that can result in very good accuracy without any additional calibration on the part of the end user. When using the gain and offset data from NVR7, it is recommended to disable automatic offset compensation for best accuracy. Details for how to configure automatic offset compensation are found in LSAD Output Data. There are two sets of gain and offset values stored in NVR7, one each for the Low and High Frequency Modes. Both values are stored in signed integer format and must be converted to floating point values. The code below uses the low frequency gain and offset values. The resulting floating point values are in Volts.
TRIM_Type *trim = TRIM;
float offset_error = (float)((int16_t)trim->lsad_trim.lf_offset) / 32768.0f;
float gain_error = (float)(trim->lsad_trim.lf_gain) / 65536.0f;
Once the gain and offset values have been converted, and the LSAD data has been converted to a floating point voltage (in Volts), the gain and offset can be applied. The equation below demonstrates how to apply the gain and offset.
Compensated voltage = (measured voltage - offset)/gain
For registers, see LSAD Registers.