RF_BLE_LR

Bit Field

Read/Write

Field Name

Description

30:24

RW

BLR_SYNC_THRESHOLD_BLE_SYNC_THR

Threshold for the BLR sync word detector

19:16

RW

BLR_PREAMBLE_BLE_PRE_THR

Threshold for the BLR preamble detector

15

RW

BLE_LONG_RANGE_BLR_PUT_RI_FIFO

During the reception the RI (rate indicator) is put into the Rx FIFO (banked)

14

RW

BLE_LONG_RANGE_BLR500_NO_ROUGH

Rough recovery is stopped during the 500kbps payloads of BLR packets (banked)

13

RW

BLE_LONG_RANGE_BLR_LIN_FILTER

Matched filter (banked)

12

RW

BLE_LONG_RANGE_EN_BLR_FLUSH

Viterbi path 0 flushing at the end of the packet (banked)

11

RW

BLE_LONG_RANGE_BLR_USE_EXT_LEN

BLR_PKT_LEN for flushing out the Viterbi (banked)

10

RW

BLE_LONG_RANGE_DISABLE_BLR_TX

Long Range feature in Tx mode (banked)

9

RW

BLE_LONG_RANGE_BLR_500_N125

Data rate selection (banked)

8

RW

BLE_LONG_RANGE_EN_BLR

BLE long range mode (banked)

4

RW

HW_TRIGGER_HW_TRIG_GPIO

HW trigger is mapped on the GPIO instead of the Tx_on signal 0x0

3

RW

HW_TRIGGER_HW_TRIG_SUBBAND

Activate the sub-band selection during the Tx activation

2

RW

HW_TRIGGER_HW_TRIG_TX_NRX

Activate the Tx mode

1

RW

HW_TRIGGER_HW_TRIG_LOW

Set the trigger polarity

0

RW

HW_TRIGGER_HW_TRIG_ACTIVE

Enable HW trigger

Bit Field

Field Name

Value Symbol

Value Description

Hex Value

30:24

BLR_SYNC_THRESHOLD_BLE_SYNC_THR

BLR_SYNC_THRESHOLD_BLE_SYNC_THR_DEFAULT

Unsigned value smaller than 64

0x38*

19:16

BLR_PREAMBLE_BLE_PRE_THR

BLR_PREAMBLE_BLE_PRE_THR_DEFAULT

Unsigned value

0x1*

15

BLE_LONG_RANGE_BLR_PUT_RI_FIFO

BLE_LONG_RANGE_BLR_PUT_RI_FIFO_DISABLE

Do not put RI in the RX FIFO

0x0

BLE_LONG_RANGE_BLR_PUT_RI_FIFO_ENABLE

Put RI in the RX FIFO

0x1*

14

BLE_LONG_RANGE_BLR500_NO_ROUGH

BLE_LONG_RANGE_BLR500_NO_ROUGH_NO_STOP

Rough recovery is not stopped

0x0

BLE_LONG_RANGE_BLR500_NO_ROUGH_STOP

Rough recovery is stopped

0x1*

13

BLE_LONG_RANGE_BLR_LIN_FILTER

BLE_LONG_RANGE_BLR_LIN_FILTER_DISABLE

The matched filter is not linear in BLR mode

0x0

BLE_LONG_RANGE_BLR_LIN_FILTER_ENABLE

The matched filter is linear in BLR mode

0x1*

12

BLE_LONG_RANGE_EN_BLR_FLUSH

BLE_LONG_RANGE_EN_BLR_FLUSH_DISABLE

The Viterbi path 0 is not flushed at 2Mbps

0x0

BLE_LONG_RANGE_EN_BLR_FLUSH_ENABLE

The Viterbi path 0 is flushed at 2Mbps

0x1*

11

BLE_LONG_RANGE_BLR_USE_EXT_LEN

BLE_LONG_RANGE_BLR_USE_EXT_LEN_NOT_USED

The value in BLR_PKT_LEN will not be used for the flush out of the Viterbi at the end of the packet

0x0*

BLE_LONG_RANGE_BLR_USE_EXT_LEN_USED

The value in BLR_PKT_LEN will be used for the flush out of the Viterbi at the end of the packet

0x1

10

BLE_LONG_RANGE_DISABLE_BLR_TX

BLE_LONG_RANGE_DISABLE_BLR_TX_ENABLE

Long Range feature is enabled in Tx mode

0x0*

BLE_LONG_RANGE_DISABLE_BLR_TX_DISABLE

Long Range feature is disabled in Tx mode

0x1

9

BLE_LONG_RANGE_BLR_500_N125

BLE_LONG_RANGE_BLR_500_N125_125

125 kbps mode is used

0x0*

BLE_LONG_RANGE_BLR_500_N125_500

500 kbps mode is used

0x1

8

BLE_LONG_RANGE_EN_BLR

BLE_LONG_RANGE_EN_BLR_DISABLE

Disable the BLE long range mode

0x0*

BLE_LONG_RANGE_EN_BLR_ENABLE

Enable the BLE long range mode

0x1

4

HW_TRIGGER_HW_TRIG_GPIO

HW_TRIGGER_HW_TRIG_GPIO_TX_ON

HW trigger mapped on TX_ON

0x0*

HW_TRIGGER_HW_TRIG_GPIO

HW trigger mapped on GPIO

0x1

3

HW_TRIGGER_HW_TRIG_SUBBAND

HW_TRIGGER_HW_TRIG_SUBBAND_NOT_ACTIVE

HW trigger does not active sub-band selection

0x0*

HW_TRIGGER_HW_TRIG_SUBBAND_ACTIVE

HW trigger actives sub-band selection

0x1

2

HW_TRIGGER_HW_TRIG_TX_NRX

HW_TRIGGER_HW_TRIG_TX_NRX_RX

HW trigger actives RX mode

0x0*

HW_TRIGGER_HW_TRIG_TX_NRX_TX

HW trigger actives TX mode

0x1

1

HW_TRIGGER_HW_TRIG_LOW

HW_TRIGGER_HW_TRIG_LOW_LOW

HW trigger active low

0x0*

HW_TRIGGER_HW_TRIG_LOW_HIGH

HW trigger active high

0x1

0

HW_TRIGGER_HW_TRIG_ACTIVE

HW_TRIGGER_HW_TRIG_ACTIVE_DISABLE

Disable HW trigger

0x0*

HW_TRIGGER_HW_TRIG_ACTIVE_ENABLE

Enable HW trigger

0x1