Nested Vector Interrupt Controller
Address |
Register Name |
Register Write |
Register Read |
Default |
Description |
---|---|---|---|---|---|
0xE000E100 |
NVIC_ISER0 |
(31) ASCC_PHASE |
(31) ASCC_PHASE |
0x0 |
ASCC_PHASE interrupt set enable |
|
|
(30) ASCC_PERIOD |
(30) ASCC_PERIOD |
0x0 |
ASCC_PERIOD interrupt set enable |
|
|
(29) CC312 |
(29) CC312 |
0x0 |
CC312 interrupt set enable |
|
|
(28) FPU |
(28) FPU |
0x0 |
FPU interrupt set enable |
|
|
(27) LIN0 |
(27) LIN0 |
0x0 |
LIN0 interrupt set enable |
|
|
(26) PCM0_ERROR |
(26) PCM0_ERROR |
0x0 |
PCM0_ERROR interrupt set enable |
|
|
(25) PCM0_RX_TX |
(25) PCM0_RX_TX |
0x0 |
PCM0_RX_TX interrupt set enable |
|
|
(24) UART0_ERROR |
(24) UART0_ERROR |
0x0 |
UART0_ERROR interrupt set enable |
|
|
(23) UART0_TX |
(23) UART0_TX |
0x0 |
UART0_TX interrupt set enable |
|
|
(22) UART0_RX |
(22) UART0_RX |
0x0 |
UART0_RX interrupt set enable |
|
|
(21) I2C1 |
(21) I2C1 |
0x0 |
I2C1 interrupt set enable |
|
|
(20) I2C0 |
(20) I2C0 |
0x0 |
I2C0 interrupt set enable |
|
|
(19) SPI1_COM |
(19) SPI1_COM |
0x0 |
SPI1_COM interrupt set enable |
|
|
(18) SPI1_TX |
(18) SPI1_TX |
0x0 |
SPI1_TX interrupt set enable |
|
|
(17) SPI1_RX |
(17) SPI1_RX |
0x0 |
SPI1_RX interrupt set enable |
|
|
(16) SPI0_COM |
(16) SPI0_COM |
0x0 |
SPI0_COM interrupt set enable |
|
|
(15) SPI0_TX |
(15) SPI0_TX |
0x0 |
SPI0_TX interrupt set enable |
|
|
(14) SPI0_RX |
(14) SPI0_RX |
0x0 |
SPI0_RX interrupt set enable |
|
|
(13) WATCHDOG |
(13) WATCHDOG |
0x0 |
WATCHDOG interrupt set enable |
|
|
(12) GPIO3 |
(12) GPIO3 |
0x0 |
GPIO3 interrupt set enable |
|
|
(11) GPIO2 |
(11) GPIO2 |
0x0 |
GPIO2 interrupt set enable |
|
|
(10) GPIO1 |
(10) GPIO1 |
0x0 |
GPIO1 interrupt set enable |
|
|
(9) GPIO0 |
(9) GPIO0 |
0x0 |
GPIO0 interrupt set enable |
|
|
(8) FIFO |
(8) FIFO |
0x0 |
FIFO interrupt set enable |
|
|
(7) TIMER3 |
(7) TIMER3 |
0x0 |
TIMER3 interrupt set enable |
|
|
(6) TIMER2 |
(6) TIMER2 |
0x0 |
TIMER2 interrupt set enable |
|
|
(5) TIMER1 |
(5) TIMER1 |
0x0 |
TIMER1 interrupt set enable |
|
|
(4) TIMER0 |
(4) TIMER0 |
0x0 |
TIMER0 interrupt set enable |
|
|
(3) LSAD_MONITOR |
(3) LSAD_MONITOR |
0x0 |
LSAD_MONITOR interrupt set enable |
|
|
(2) RTC_CLOCK |
(2) RTC_CLOCK |
0x0 |
RTC_CLOCK interrupt set enable |
|
|
(1) RTC_ALARM |
(1) RTC_ALARM |
0x0 |
RTC_ALARM interrupt set enable |
|
|
(0) WAKEUP |
(0) WAKEUP |
0x0 |
WAKEUP interrupt set enable |
0xE000E104 |
NVIC_ISER1 |
(24) DMA3 |
(24) DMA3 |
0x0 |
DMA3 interrupt set enable |
|
|
(23) DMA2 |
(23) DMA2 |
0x0 |
DMA2 interrupt set enable |
|
|
(22) DMA1 |
(22) DMA1 |
0x0 |
DMA1 interrupt set enable |
|
|
(21) DMA0 |
(21) DMA0 |
0x0 |
DMA0 interrupt set enable |
|
|
(20) ACCESS_ERROR |
(20) ACCESS_ERROR |
0x0 |
ACCESS_ERROR interrupt set enable |
|
|
(19) FLASH0_ECC |
(19) FLASH0_ECC |
0x0 |
FLASH0_ECC interrupt set enable |
|
|
(18) FLASH0_COPY |
(18) FLASH0_COPY |
0x0 |
FLASH0_COPY interrupt set enable |
|
|
(17) RF_RXFIFO |
(17) RF_RXFIFO |
0x0 |
RF_RXFIFO interrupt set enable |
|
|
(16) RF_TXFIFO |
(16) RF_TXFIFO |
0x0 |
RF_TXFIFO interrupt set enable |
|
|
(15) RF_SYNC |
(15) RF_SYNC |
0x0 |
RF_SYNC interrupt set enable |
|
|
(14) RF_IRQ_RECEIVED |
(14) RF_IRQ_RECEIVED |
0x0 |
RF_IRQ_RECEIVED interrupt set enable |
|
|
(13) RF_RXSTOP |
(13) RF_RXSTOP |
0x0 |
RF_RXSTOP interrupt set enable |
|
|
(12) RF_TX |
(12) RF_TX |
0x0 |
RF_TX interrupt set enable |
|
|
(11) TOF |
(11) TOF |
0x0 |
TOF interrupt set enable |
|
|
(10) BLE_COEX_RX_TX |
(10) BLE_COEX_RX_TX |
0x0 |
BLE_COEX_RX_TX interrupt set enable |
|
|
(9) BLE_COEX_IN_PROCESS |
(9) BLE_COEX_IN_PROCESS |
0x0 |
BLE_COEX_IN_PROCESS interrupt set enable |
|
|
(8) BLE_ERROR |
(8) BLE_ERROR |
0x0 |
BLE_ERROR interrupt set enable |
|
|
(7) BLE_FIFO |
(7) BLE_FIFO |
0x0 |
BLE_FIFO interrupt set enable |
|
|
(6) BLE_HSLOT |
(6) BLE_HSLOT |
0x0 |
BLE_HSLOT interrupt set enable |
|
|
(5) BLE_SLP |
(5) BLE_SLP |
0x0 |
BLE_SLP interrupt set enable |
|
|
(4) BLE_CRYPT |
(4) BLE_CRYPT |
0x0 |
BLE_CRYPT interrupt set enable |
|
|
(3) BLE_TIMESTAMP_TGT2 |
(3) BLE_TIMESTAMP_TGT2 |
0x0 |
BLE_TIMESTAMP_TGT2 interrupt set enable |
|
|
(2) BLE_TIMESTAMP_TGT1 |
(2) BLE_TIMESTAMP_TGT1 |
0x0 |
BLE_TIMESTAMP_TGT1 interrupt set enable |
|
|
(1) BLE_FINETGT |
(1) BLE_FINETGT |
0x0 |
BLE_FINETGT interrupt set enable |
|
|
(0) BLE_SW |
(0) BLE_SW |
0x0 |
BLE_SW interrupt set enable |
0xE000E180 |
NVIC_ICER0 |
(31) ASCC_PHASE |
(31) ASCC_PHASE |
0x0 |
ASCC_PHASE interrupt clear enable |
|
|
(30) ASCC_PERIOD |
(30) ASCC_PERIOD |
0x0 |
ASCC_PERIOD interrupt clear enable |
|
|
(29) CC312 |
(29) CC312 |
0x0 |
CC312 interrupt clear enable |
|
|
(28) FPU |
(28) FPU |
0x0 |
FPU interrupt clear enable |
|
|
(27) LIN0 |
(27) LIN0 |
0x0 |
LIN0 interrupt clear enable |
|
|
(26) PCM0_ERROR |
(26) PCM0_ERROR |
0x0 |
PCM0_ERROR interrupt clear enable |
|
|
(25) PCM0_RX_TX |
(25) PCM0_RX_TX |
0x0 |
PCM0_RX_TX interrupt clear enable |
|
|
(24) UART0_ERROR |
(24) UART0_ERROR |
0x0 |
UART0_ERROR interrupt clear enable |
|
|
(23) UART0_TX |
(23) UART0_TX |
0x0 |
UART0_TX interrupt clear enable |
|
|
(22) UART0_RX |
(22) UART0_RX |
0x0 |
UART0_RX interrupt clear enable |
|
|
(21) I2C1 |
(21) I2C1 |
0x0 |
I2C1 interrupt clear enable |
|
|
(20) I2C0 |
(20) I2C0 |
0x0 |
I2C0 interrupt clear enable |
|
|
(19) SPI1_COM |
(19) SPI1_COM |
0x0 |
SPI1_COM interrupt clear enable |
|
|
(18) SPI1_TX |
(18) SPI1_TX |
0x0 |
SPI1_TX interrupt clear enable |
|
|
(17) SPI1_RX |
(17) SPI1_RX |
0x0 |
SPI1_RX interrupt clear enable |
|
|
(16) SPI0_COM |
(16) SPI0_COM |
0x0 |
SPI0_COM interrupt clear enable |
|
|
(15) SPI0_TX |
(15) SPI0_TX |
0x0 |
SPI0_TX interrupt clear enable |
|
|
(14) SPI0_RX |
(14) SPI0_RX |
0x0 |
SPI0_RX interrupt clear enable |
|
|
(13) WATCHDOG |
(13) WATCHDOG |
0x0 |
WATCHDOG interrupt clear enable |
|
|
(12) GPIO3 |
(12) GPIO3 |
0x0 |
GPIO3 interrupt clear enable |
|
|
(11) GPIO2 |
(11) GPIO2 |
0x0 |
GPIO2 interrupt clear enable |
|
|
(10) GPIO1 |
(10) GPIO1 |
0x0 |
GPIO1 interrupt clear enable |
|
|
(9) GPIO0 |
(9) GPIO0 |
0x0 |
GPIO0 interrupt clear enable |
|
|
(8) FIFO |
(8) FIFO |
0x0 |
FIFO interrupt clear enable |
|
|
(7) TIMER3 |
(7) TIMER3 |
0x0 |
TIMER3 interrupt clear enable |
|
|
(6) TIMER2 |
(6) TIMER2 |
0x0 |
TIMER2 interrupt clear enable |
|
|
(5) TIMER1 |
(5) TIMER1 |
0x0 |
TIMER1 interrupt clear enable |
|
|
(4) TIMER0 |
(4) TIMER0 |
0x0 |
TIMER0 interrupt clear enable |
|
|
(3) LSAD_MONITOR |
(3) LSAD_MONITOR |
0x0 |
LSAD_MONITOR interrupt clear enable |
|
|
(2) RTC_CLOCK |
(2) RTC_CLOCK |
0x0 |
RTC_CLOCK interrupt clear enable |
|
|
(1) RTC_ALARM |
(1) RTC_ALARM |
0x0 |
RTC_ALARM interrupt clear enable |
|
|
(0) WAKEUP |
(0) WAKEUP |
0x0 |
WAKEUP interrupt clear enable |
0xE000E184 |
NVIC_ICER1 |
(24) DMA3 |
(24) DMA3 |
0x-1 |
DMA3 interrupt clear enable |
|
|
(23) DMA2 |
(23) DMA2 |
0x0 |
DMA2 interrupt clear enable |
|
|
(22) DMA1 |
(22) DMA1 |
0x0 |
DMA1 interrupt clear enable |
|
|
(21) DMA0 |
(21) DMA0 |
0x0 |
DMA0 interrupt clear enable |
|
|
(20) ACCESS_ERROR |
(20) ACCESS_ERROR |
0x0 |
ACCESS_ERROR interrupt clear enable |
|
|
(19) FLASH0_ECC |
(19) FLASH0_ECC |
0x0 |
FLASH0_ECC interrupt clear enable |
|
|
(18) FLASH0_COPY |
(18) FLASH0_COPY |
0x0 |
FLASH0_COPY interrupt clear enable |
|
|
(17) RF_RXFIFO |
(17) RF_RXFIFO |
0x0 |
RF_RXFIFO interrupt clear enable |
|
|
(16) RF_TXFIFO |
(16) RF_TXFIFO |
0x0 |
RF_TXFIFO interrupt clear enable |
|
|
(15) RF_SYNC |
(15) RF_SYNC |
0x0 |
RF_SYNC interrupt clear enable |
|
|
(14) RF_IRQ_RECEIVED |
(14) RF_IRQ_RECEIVED |
0x0 |
RF_IRQ_RECEIVED interrupt clear enable |
|
|
(13) RF_RXSTOP |
(13) RF_RXSTOP |
0x0 |
RF_RXSTOP interrupt clear enable |
|
|
(12) RF_TX |
(12) RF_TX |
0x0 |
RF_TX interrupt clear enable |
|
|
(11) TOF |
(11) TOF |
0x0 |
TOF interrupt clear enable |
|
|
(10) BLE_COEX_RX_TX |
(10) BLE_COEX_RX_TX |
0x0 |
BLE_COEX_RX_TX interrupt clear enable |
|
|
(9) BLE_COEX_IN_PROCESS |
(9) BLE_COEX_IN_PROCESS |
0x0 |
BLE_COEX_IN_PROCESS interrupt clear enable |
|
|
(8) BLE_ERROR |
(8) BLE_ERROR |
0x0 |
BLE_ERROR interrupt clear enable |
|
|
(7) BLE_FIFO |
(7) BLE_FIFO |
0x0 |
BLE_FIFO interrupt clear enable |
|
|
(6) BLE_HSLOT |
(6) BLE_HSLOT |
0x0 |
BLE_HSLOT interrupt clear enable |
|
|
(5) BLE_SLP |
(5) BLE_SLP |
0x0 |
BLE_SLP interrupt clear enable |
|
|
(4) BLE_CRYPT |
(4) BLE_CRYPT |
0x0 |
BLE_CRYPT interrupt clear enable |
|
|
(3) BLE_TIMESTAMP_TGT2 |
(3) BLE_TIMESTAMP_TGT2 |
0x0 |
BLE_TIMESTAMP_TGT2 interrupt clear enable |
|
|
(2) BLE_TIMESTAMP_TGT1 |
(2) BLE_TIMESTAMP_TGT1 |
0x0 |
BLE_TIMESTAMP_TGT1 interrupt clear enable |
|
|
(1) BLE_FINETGT |
(1) BLE_FINETGT |
0x0 |
BLE_FINETGT interrupt clear enable |
|
|
(0) BLE_SW |
(0) BLE_SW |
0x0 |
BLE_SW interrupt clear enable |
0xE000E200 |
NVIC_ISPR0 |
(31) ASCC_PHASE |
(31) ASCC_PHASE |
0x0 |
ASCC_PHASE interrupt set pending |
|
|
(30) ASCC_PERIOD |
(30) ASCC_PERIOD |
0x0 |
ASCC_PERIOD interrupt set pending |
|
|
(29) CC312 |
(29) CC312 |
0x0 |
CC312 interrupt set pending |
|
|
(28) FPU |
(28) FPU |
0x0 |
FPU interrupt set pending |
|
|
(27) LIN0 |
(27) LIN0 |
0x0 |
LIN0 interrupt set pending |
|
|
(26) PCM0_ERROR |
(26) PCM0_ERROR |
0x0 |
PCM0_ERROR interrupt set pending |
|
|
(25) PCM0_RX_TX |
(25) PCM0_RX_TX |
0x0 |
PCM0_RX_TX interrupt set pending |
|
|
(24) UART0_ERROR |
(24) UART0_ERROR |
0x0 |
UART0_ERROR interrupt set pending |
|
|
(23) UART0_TX |
(23) UART0_TX |
0x0 |
UART0_TX interrupt set pending |
|
|
(22) UART0_RX |
(22) UART0_RX |
0x0 |
UART0_RX interrupt set pending |
|
|
(21) I2C1 |
(21) I2C1 |
0x0 |
I2C1 interrupt set pending |
|
|
(20) I2C0 |
(20) I2C0 |
0x0 |
I2C0 interrupt set pending |
|
|
(19) SPI1_COM |
(19) SPI1_COM |
0x0 |
SPI1_COM interrupt set pending |
|
|
(18) SPI1_TX |
(18) SPI1_TX |
0x0 |
SPI1_TX interrupt set pending |
|
|
(17) SPI1_RX |
(17) SPI1_RX |
0x0 |
SPI1_RX interrupt set pending |
|
|
(16) SPI0_COM |
(16) SPI0_COM |
0x0 |
SPI0_COM interrupt set pending |
|
|
(15) SPI0_TX |
(15) SPI0_TX |
0x0 |
SPI0_TX interrupt set pending |
|
|
(14) SPI0_RX |
(14) SPI0_RX |
0x0 |
SPI0_RX interrupt set pending |
|
|
(13) WATCHDOG |
(13) WATCHDOG |
0x0 |
WATCHDOG interrupt set pending |
|
|
(12) GPIO3 |
(12) GPIO3 |
0x0 |
GPIO3 interrupt set pending |
|
|
(11) GPIO2 |
(11) GPIO2 |
0x0 |
GPIO2 interrupt set pending |
|
|
(10) GPIO1 |
(10) GPIO1 |
0x0 |
GPIO1 interrupt set pending |
|
|
(9) GPIO0 |
(9) GPIO0 |
0x0 |
GPIO0 interrupt set pending |
|
|
(8) FIFO |
(8) FIFO |
0x0 |
FIFO interrupt set pending |
|
|
(7) TIMER3 |
(7) TIMER3 |
0x0 |
TIMER3 interrupt set pending |
|
|
(6) TIMER2 |
(6) TIMER2 |
0x0 |
TIMER2 interrupt set pending |
|
|
(5) TIMER1 |
(5) TIMER1 |
0x0 |
TIMER1 interrupt set pending |
|
|
(4) TIMER0 |
(4) TIMER0 |
0x0 |
TIMER0 interrupt set pending |
|
|
(3) LSAD_MONITOR |
(3) LSAD_MONITOR |
0x0 |
LSAD_MONITOR interrupt set pending |
|
|
(2) RTC_CLOCK |
(2) RTC_CLOCK |
0x0 |
RTC_CLOCK interrupt set pending |
|
|
(1) RTC_ALARM |
(1) RTC_ALARM |
0x0 |
RTC_ALARM interrupt set pending |
|
|
(0) WAKEUP |
(0) WAKEUP |
0x0 |
WAKEUP interrupt set pending |
0xE000E204 |
NVIC_ISPR1 |
(24) DMA3 |
(24) DMA3 |
0x0 |
DMA3 interrupt set pending |
|
|
(23) DMA2 |
(23) DMA2 |
0x0 |
DMA2 interrupt set pending |
|
|
(22) DMA1 |
(22) DMA1 |
0x0 |
DMA1 interrupt set pending |
|
|
(21) DMA0 |
(21) DMA0 |
0x0 |
DMA0 interrupt set pending |
|
|
(20) ACCESS_ERROR |
(20) ACCESS_ERROR |
0x0 |
ACCESS_ERROR interrupt set pending |
|
|
(19) FLASH0_ECC |
(19) FLASH0_ECC |
0x0 |
FLASH0_ECC interrupt set pending |
|
|
(18) FLASH0_COPY |
(18) FLASH0_COPY |
0x0 |
FLASH0_COPY interrupt set pending |
|
|
(17) RF_RXFIFO |
(17) RF_RXFIFO |
0x0 |
RF_RXFIFO interrupt set pending |
|
|
(16) RF_TXFIFO |
(16) RF_TXFIFO |
0x0 |
RF_TXFIFO interrupt set pending |
|
|
(15) RF_SYNC |
(15) RF_SYNC |
0x0 |
RF_SYNC interrupt set pending |
|
|
(14) RF_IRQ_RECEIVED |
(14) RF_IRQ_RECEIVED |
0x0 |
RF_IRQ_RECEIVED interrupt set pending |
|
|
(13) RF_RXSTOP |
(13) RF_RXSTOP |
0x0 |
RF_RXSTOP interrupt set pending |
|
|
(12) RF_TX |
(12) RF_TX |
0x0 |
RF_TX interrupt set pending |
|
|
(11) TOF |
(11) TOF |
0x0 |
TOF interrupt set pending |
|
|
(10) BLE_COEX_RX_TX |
(10) BLE_COEX_RX_TX |
0x0 |
BLE_COEX_RX_TX interrupt set pending |
|
|
(9) BLE_COEX_IN_PROCESS |
(9) BLE_COEX_IN_PROCESS |
0x0 |
BLE_COEX_IN_PROCESS interrupt set pending |
|
|
(8) BLE_ERROR |
(8) BLE_ERROR |
0x0 |
BLE_ERROR interrupt set pending |
|
|
(7) BLE_FIFO |
(7) BLE_FIFO |
0x0 |
BLE_FIFO interrupt set pending |
|
|
(6) BLE_HSLOT |
(6) BLE_HSLOT |
0x0 |
BLE_HSLOT interrupt set pending |
|
|
(5) BLE_SLP |
(5) BLE_SLP |
0x0 |
BLE_SLP interrupt set pending |
|
|
(4) BLE_CRYPT |
(4) BLE_CRYPT |
0x0 |
BLE_CRYPT interrupt set pending |
|
|
(3) BLE_TIMESTAMP_TGT2 |
(3) BLE_TIMESTAMP_TGT2 |
0x0 |
BLE_TIMESTAMP_TGT2 interrupt set pending |
|
|
(2) BLE_TIMESTAMP_TGT1 |
(2) BLE_TIMESTAMP_TGT1 |
0x0 |
BLE_TIMESTAMP_TGT1 interrupt set pending |
|
|
(1) BLE_FINETGT |
(1) BLE_FINETGT |
0x0 |
BLE_FINETGT interrupt set pending |
|
|
(0) BLE_SW |
(0) BLE_SW |
0x0 |
BLE_SW interrupt set pending |
0xE000E280 |
NVIC_ICPR0 |
(31) ASCC_PHASE |
(31) ASCC_PHASE |
0x0 |
ASCC_PHASE interrupt clear pending |
|
|
(30) ASCC_PERIOD |
(30) ASCC_PERIOD |
0x0 |
ASCC_PERIOD interrupt clear pending |
|
|
(29) CC312 |
(29) CC312 |
0x0 |
CC312 interrupt clear pending |
|
|
(28) FPU |
(28) FPU |
0x0 |
FPU interrupt clear pending |
|
|
(27) LIN0 |
(27) LIN0 |
0x0 |
LIN0 interrupt clear pending |
|
|
(26) PCM0_ERROR |
(26) PCM0_ERROR |
0x0 |
PCM0_ERROR interrupt clear pending |
|
|
(25) PCM0_RX_TX |
(25) PCM0_RX_TX |
0x0 |
PCM0_RX_TX interrupt clear pending |
|
|
(24) UART0_ERROR |
(24) UART0_ERROR |
0x0 |
UART0_ERROR interrupt clear pending |
|
|
(23) UART0_TX |
(23) UART0_TX |
0x0 |
UART0_TX interrupt clear pending |
|
|
(22) UART0_RX |
(22) UART0_RX |
0x0 |
UART0_RX interrupt clear pending |
|
|
(21) I2C1 |
(21) I2C1 |
0x0 |
I2C1 interrupt clear pending |
|
|
(20) I2C0 |
(20) I2C0 |
0x0 |
I2C0 interrupt clear pending |
|
|
(19) SPI1_COM |
(19) SPI1_COM |
0x0 |
SPI1_COM interrupt clear pending |
|
|
(18) SPI1_TX |
(18) SPI1_TX |
0x0 |
SPI1_TX interrupt clear pending |
|
|
(17) SPI1_RX |
(17) SPI1_RX |
0x0 |
SPI1_RX interrupt clear pending |
|
|
(16) SPI0_COM |
(16) SPI0_COM |
0x0 |
SPI0_COM interrupt clear pending |
|
|
(15) SPI0_TX |
(15) SPI0_TX |
0x0 |
SPI0_TX interrupt clear pending |
|
|
(14) SPI0_RX |
(14) SPI0_RX |
0x0 |
SPI0_RX interrupt clear pending |
|
|
(13) WATCHDOG |
(13) WATCHDOG |
0x0 |
WATCHDOG interrupt clear pending |
|
|
(12) GPIO3 |
(12) GPIO3 |
0x0 |
GPIO3 interrupt clear pending |
|
|
(11) GPIO2 |
(11) GPIO2 |
0x0 |
GPIO2 interrupt clear pending |
|
|
(10) GPIO1 |
(10) GPIO1 |
0x0 |
GPIO1 interrupt clear pending |
|
|
(9) GPIO0 |
(9) GPIO0 |
0x0 |
GPIO0 interrupt clear pending |
|
|
(8) FIFO |
(8) FIFO |
0x0 |
FIFO interrupt clear pending |
|
|
(7) TIMER3 |
(7) TIMER3 |
0x0 |
TIMER3 interrupt clear pending |
|
|
(6) TIMER2 |
(6) TIMER2 |
0x0 |
TIMER2 interrupt clear pending |
|
|
(5) TIMER1 |
(5) TIMER1 |
0x0 |
TIMER1 interrupt clear pending |
|
|
(4) TIMER0 |
(4) TIMER0 |
0x0 |
TIMER0 interrupt clear pending |
|
|
(3) LSAD_MONITOR |
(3) LSAD_MONITOR |
0x0 |
LSAD_MONITOR interrupt clear pending |
|
|
(2) RTC_CLOCK |
(2) RTC_CLOCK |
0x0 |
RTC_CLOCK interrupt clear pending |
|
|
(1) RTC_ALARM |
(1) RTC_ALARM |
0x0 |
RTC_ALARM interrupt clear pending |
|
|
(0) WAKEUP |
(0) WAKEUP |
0x0 |
WAKEUP interrupt clear pending |
0xE000E284 |
NVIC_ICPR1 |
(24) DMA3 |
(24) DMA3 |
0x0 |
DMA3 interrupt clear pending |
|
|
(23) DMA2 |
(23) DMA2 |
0x0 |
DMA2 interrupt clear pending |
|
|
(22) DMA1 |
(22) DMA1 |
0x0 |
DMA1 interrupt clear pending |
|
|
(21) DMA0 |
(21) DMA0 |
0x0 |
DMA0 interrupt clear pending |
|
|
(20) ACCESS_ERROR |
(20) ACCESS_ERROR |
0x0 |
ACCESS_ERROR interrupt clear pending |
|
|
(19) FLASH0_ECC |
(19) FLASH0_ECC |
0x0 |
FLASH0_ECC interrupt clear pending |
|
|
(18) FLASH0_COPY |
(18) FLASH0_COPY |
0x0 |
FLASH0_COPY interrupt clear pending |
|
|
(17) RF_RXFIFO |
(17) RF_RXFIFO |
0x0 |
RF_RXFIFO interrupt clear pending |
|
|
(16) RF_TXFIFO |
(16) RF_TXFIFO |
0x0 |
RF_TXFIFO interrupt clear pending |
|
|
(15) RF_SYNC |
(15) RF_SYNC |
0x0 |
RF_SYNC interrupt clear pending |
|
|
(14) RF_IRQ_RECEIVED |
(14) RF_IRQ_RECEIVED |
0x0 |
RF_IRQ_RECEIVED interrupt clear pending |
|
|
(13) RF_RXSTOP |
(13) RF_RXSTOP |
0x0 |
RF_RXSTOP interrupt clear pending |
|
|
(12) RF_TX |
(12) RF_TX |
0x0 |
RF_TX interrupt clear pending |
|
|
(11) TOF |
(11) TOF |
0x0 |
TOF interrupt clear pending |
|
|
(10) BLE_COEX_RX_TX |
(10) BLE_COEX_RX_TX |
0x0 |
BLE_COEX_RX_TX interrupt clear pending |
|
|
(9) BLE_COEX_IN_PROCESS |
(9) BLE_COEX_IN_PROCESS |
0x0 |
BLE_COEX_IN_PROCESS interrupt clear pending |
|
|
(8) BLE_ERROR |
(8) BLE_ERROR |
0x0 |
BLE_ERROR interrupt clear pending |
|
|
(7) BLE_FIFO |
(7) BLE_FIFO |
0x0 |
BLE_FIFO interrupt clear pending |
|
|
(6) BLE_HSLOT |
(6) BLE_HSLOT |
0x0 |
BLE_HSLOT interrupt clear pending |
|
|
(5) BLE_SLP |
(5) BLE_SLP |
0x0 |
BLE_SLP interrupt clear pending |
|
|
(4) BLE_CRYPT |
(4) BLE_CRYPT |
0x0 |
BLE_CRYPT interrupt clear pending |
|
|
(3) BLE_TIMESTAMP_TGT2 |
(3) BLE_TIMESTAMP_TGT2 |
0x0 |
BLE_TIMESTAMP_TGT2 interrupt clear pending |
|
|
(2) BLE_TIMESTAMP_TGT1 |
(2) BLE_TIMESTAMP_TGT1 |
0x0 |
BLE_TIMESTAMP_TGT1 interrupt clear pending |
|
|
(1) BLE_FINETGT |
(1) BLE_FINETGT |
0x0 |
BLE_FINETGT interrupt clear pending |
|
|
(0) BLE_SW |
(0) BLE_SW |
0x0 |
BLE_SW interrupt clear pending |
0xE000E300 |
NVIC_IABR0 |
- |
(31) ASCC_PHASE |
0x0 |
Set the ASCC_PHASE interrupt as active |
|
|
- |
(30) ASCC_PERIOD |
0x0 |
Set the ASCC_PERIOD interrupt as active |
|
|
- |
(29) CC312 |
0x0 |
Set the CC312 interrupt as active |
|
|
- |
(28) FPU |
0x0 |
Set the FPU interrupt as active |
|
|
- |
(27) LIN0 |
0x0 |
Set the LIN0 interrupt as active |
|
|
- |
(26) PCM0_ERROR |
0x0 |
Set the PCM0_ERROR interrupt as active |
|
|
- |
(25) PCM0_RX_TX |
0x0 |
Set the PCM0_RX_TX interrupt as active |
|
|
- |
(24) UART0_ERROR |
0x0 |
Set the UART0_ERROR interrupt as active |
|
|
- |
(23) UART0_TX |
0x0 |
Set the UART0_TX interrupt as active |
|
|
- |
(22) UART0_RX |
0x0 |
Set the UART0_RX interrupt as active |
|
|
- |
(21) I2C1 |
0x0 |
Set the I2C1 interrupt as active |
|
|
- |
(20) I2C0 |
0x0 |
Set the I2C0 interrupt as active |
|
|
- |
(19) SPI1_COM |
0x0 |
Set the SPI1_COM interrupt as active |
|
|
- |
(18) SPI1_TX |
0x0 |
Set the SPI1_TX interrupt as active |
|
|
- |
(17) SPI1_RX |
0x0 |
Set the SPI1_RX interrupt as active |
|
|
- |
(16) SPI0_COM |
0x0 |
Set the SPI0_COM interrupt as active |
|
|
- |
(15) SPI0_TX |
0x0 |
Set the SPI0_TX interrupt as active |
|
|
- |
(14) SPI0_RX |
0x0 |
Set the SPI0_RX interrupt as active |
|
|
- |
(13) WATCHDOG |
0x0 |
Set the WATCHDOG interrupt as active |
|
|
- |
(12) GPIO3 |
0x0 |
Set the GPIO3 interrupt as active |
|
|
- |
(11) GPIO2 |
0x0 |
Set the GPIO2 interrupt as active |
|
|
- |
(10) GPIO1 |
0x0 |
Set the GPIO1 interrupt as active |
|
|
- |
(9) GPIO0 |
0x0 |
Set the GPIO0 interrupt as active |
|
|
- |
(8) FIFO |
0x0 |
Set the FIFO interrupt as active |
|
|
- |
(7) TIMER3 |
0x0 |
Set the TIMER3 interrupt as active |
|
|
- |
(6) TIMER2 |
0x0 |
Set the TIMER2 interrupt as active |
|
|
- |
(5) TIMER1 |
0x0 |
Set the TIMER1 interrupt as active |
|
|
- |
(4) TIMER0 |
0x0 |
Set the TIMER0 interrupt as active |
|
|
- |
(3) LSAD_MONITOR |
0x0 |
Set the LSAD_MONITOR interrupt as active |
|
|
- |
(2) RTC_CLOCK |
0x0 |
Set the RTC_CLOCK interrupt as active |
|
|
- |
(1) RTC_ALARM |
0x0 |
Set the RTC_ALARM interrupt as active |
|
|
- |
(0) WAKEUP |
0x0 |
Set the WAKEUP interrupt as active |
0xE000E304 |
NVIC_IABR1 |
- |
(24) DMA3 |
0x0 |
Set the DMA3 interrupt as active |
|
|
- |
(23) DMA2 |
0x0 |
Set the DMA2 interrupt as active |
|
|
- |
(22) DMA1 |
0x0 |
Set the DMA1 interrupt as active |
|
|
- |
(21) DMA0 |
0x0 |
Set the DMA0 interrupt as active |
|
|
- |
(20) ACCESS_ERROR |
0x0 |
Set the ACCESS_ERROR interrupt as active |
|
|
- |
(19) FLASH0_ECC |
0x0 |
Set the FLASH0_ECC interrupt as active |
|
|
- |
(18) FLASH0_COPY |
0x0 |
Set the FLASH0_COPY interrupt as active |
|
|
- |
(17) RF_RXFIFO |
0x0 |
Set the RF_RXFIFO interrupt as active |
|
|
- |
(16) RF_TXFIFO |
0x0 |
Set the RF_TXFIFO interrupt as active |
|
|
- |
(15) RF_SYNC |
0x0 |
Set the RF_SYNC interrupt as active |
|
|
- |
(14) RF_IRQ_RECEIVED |
0x0 |
Set the RF_IRQ_RECEIVED interrupt as active |
|
|
- |
(13) RF_RXSTOP |
0x0 |
Set the RF_RXSTOP interrupt as active |
|
|
- |
(12) RF_TX |
0x0 |
Set the RF_TX interrupt as active |
|
|
- |
(11) TOF |
0x0 |
Set the TOF interrupt as active |
|
|
- |
(10) BLE_COEX_RX_TX |
0x0 |
Set the BLE_COEX_RX_TX interrupt as active |
|
|
- |
(9) BLE_COEX_IN_PROCESS |
0x0 |
Set the BLE_COEX_IN_PROCESS interrupt as active |
|
|
- |
(8) BLE_ERROR |
0x0 |
Set the BLE_ERROR interrupt as active |
|
|
- |
(7) BLE_FIFO |
0x0 |
Set the BLE_FIFO interrupt as active |
|
|
- |
(6) BLE_HSLOT |
0x0 |
Set the BLE_HSLOT interrupt as active |
|
|
- |
(5) BLE_SLP |
0x0 |
Set the BLE_SLP interrupt as active |
|
|
- |
(4) BLE_CRYPT |
0x0 |
Set the BLE_CRYPT interrupt as active |
|
|
- |
(3) BLE_TIMESTAMP_TGT2 |
0x0 |
Set the BLE_TIMESTAMP_TGT2 interrupt as active |
|
|
- |
(2) BLE_TIMESTAMP_TGT1 |
0x0 |
Set the BLE_TIMESTAMP_TGT1 interrupt as active |
|
|
- |
(1) BLE_FINETGT |
0x0 |
Set the BLE_FINETGT interrupt as active |
|
|
- |
(0) BLE_SW |
0x0 |
Set the BLE_SW interrupt as active |
0xE000E380 |
NVIC_ITNS0 |
(31) ASCC_PHASE |
(31) ASCC_PHASE |
0x0 |
Set the ASCC_PHASE interrupt as non-secure |
|
|
(30) ASCC_PERIOD |
(30) ASCC_PERIOD |
0x0 |
Set the ASCC_PERIOD interrupt as non-secure |
|
|
(29) CC312 |
(29) CC312 |
0x0 |
Set the CC312 interrupt as non-secure |
|
|
(28) FPU |
(28) FPU |
0x0 |
Set the FPU interrupt as non-secure |
|
|
(27) LIN0 |
(27) LIN0 |
0x0 |
Set the LIN0 interrupt as non-secure |
|
|
(26) PCM0_ERROR |
(26) PCM0_ERROR |
0x0 |
Set the PCM0_ERROR interrupt as non-secure |
|
|
(25) PCM0_RX_TX |
(25) PCM0_RX_TX |
0x0 |
Set the PCM0_RX_TX interrupt as non-secure |
|
|
(24) UART0_ERROR |
(24) UART0_ERROR |
0x0 |
Set the UART0_ERROR interrupt as non-secure |
|
|
(23) UART0_TX |
(23) UART0_TX |
0x0 |
Set the UART0_TX interrupt as non-secure |
|
|
(22) UART0_RX |
(22) UART0_RX |
0x0 |
Set the UART0_RX interrupt as non-secure |
|
|
(21) I2C1 |
(21) I2C1 |
0x0 |
Set the I2C1 interrupt as non-secure |
|
|
(20) I2C0 |
(20) I2C0 |
0x0 |
Set the I2C0 interrupt as non-secure |
|
|
(19) SPI1_COM |
(19) SPI1_COM |
0x0 |
Set the SPI1_COM interrupt as non-secure |
|
|
(18) SPI1_TX |
(18) SPI1_TX |
0x0 |
Set the SPI1_TX interrupt as non-secure |
|
|
(17) SPI1_RX |
(17) SPI1_RX |
0x0 |
Set the SPI1_RX interrupt as non-secure |
|
|
(16) SPI0_COM |
(16) SPI0_COM |
0x0 |
Set the SPI0_COM interrupt as non-secure |
|
|
(15) SPI0_TX |
(15) SPI0_TX |
0x0 |
Set the SPI0_TX interrupt as non-secure |
|
|
(14) SPI0_RX |
(14) SPI0_RX |
0x0 |
Set the SPI0_RX interrupt as non-secure |
|
|
(13) WATCHDOG |
(13) WATCHDOG |
0x0 |
Set the WATCHDOG interrupt as non-secure |
|
|
(12) GPIO3 |
(12) GPIO3 |
0x0 |
Set the GPIO3 interrupt as non-secure |
|
|
(11) GPIO2 |
(11) GPIO2 |
0x0 |
Set the GPIO2 interrupt as non-secure |
|
|
(10) GPIO1 |
(10) GPIO1 |
0x0 |
Set the GPIO1 interrupt as non-secure |
|
|
(9) GPIO0 |
(9) GPIO0 |
0x0 |
Set the GPIO0 interrupt as non-secure |
|
|
(8) FIFO |
(8) FIFO |
0x0 |
Set the FIFO interrupt as non-secure |
|
|
(7) TIMER3 |
(7) TIMER3 |
0x0 |
Set the TIMER3 interrupt as non-secure |
|
|
(6) TIMER2 |
(6) TIMER2 |
0x0 |
Set the TIMER2 interrupt as non-secure |
|
|
(5) TIMER1 |
(5) TIMER1 |
0x0 |
Set the TIMER1 interrupt as non-secure |
|
|
(4) TIMER0 |
(4) TIMER0 |
0x0 |
Set the TIMER0 interrupt as non-secure |
|
|
(3) LSAD_MONITOR |
(3) LSAD_MONITOR |
0x0 |
Set the LSAD_MONITOR interrupt as non-secure |
|
|
(2) RTC_CLOCK |
(2) RTC_CLOCK |
0x0 |
Set the RTC_CLOCK interrupt as non-secure |
|
|
(1) RTC_ALARM |
(1) RTC_ALARM |
0x0 |
Set the RTC_ALARM interrupt as non-secure |
|
|
(0) WAKEUP |
(0) WAKEUP |
0x0 |
Set the WAKEUP interrupt as non-secure |
0xE000E384 |
NVIC_ITNS1 |
(24) DMA3 |
(24) DMA3 |
0x0 |
Set the DMA3 interrupt as non-secure |
|
|
(23) DMA2 |
(23) DMA2 |
0x0 |
Set the DMA2 interrupt as non-secure |
|
|
(22) DMA1 |
(22) DMA1 |
0x0 |
Set the DMA1 interrupt as non-secure |
|
|
(21) DMA0 |
(21) DMA0 |
0x0 |
Set the DMA0 interrupt as non-secure |
|
|
(20) ACCESS_ERROR |
(20) ACCESS_ERROR |
0x0 |
Set the ACCESS_ERROR interrupt as non-secure |
|
|
(19) FLASH0_ECC |
(19) FLASH0_ECC |
0x0 |
Set the FLASH0_ECC interrupt as non-secure |
|
|
(18) FLASH0_COPY |
(18) FLASH0_COPY |
0x0 |
Set the FLASH0_COPY interrupt as non-secure |
|
|
(17) RF_RXFIFO |
(17) RF_RXFIFO |
0x0 |
Set the RF_RXFIFO interrupt as non-secure |
|
|
(16) RF_TXFIFO |
(16) RF_TXFIFO |
0x0 |
Set the RF_TXFIFO interrupt as non-secure |
|
|
(15) RF_SYNC |
(15) RF_SYNC |
0x0 |
Set the RF_SYNC interrupt as non-secure |
|
|
(14) RF_IRQ_RECEIVED |
(14) RF_IRQ_RECEIVED |
0x0 |
Set the RF_IRQ_RECEIVED interrupt as non-secure |
|
|
(13) RF_RXSTOP |
(13) RF_RXSTOP |
0x0 |
Set the RF_RXSTOP interrupt as non-secure |
|
|
(12) RF_TX |
(12) RF_TX |
0x0 |
Set the RF_TX interrupt as non-secure |
|
|
(11) TOF |
(11) TOF |
0x0 |
Set the TOF interrupt as non-secure |
|
|
(10) BLE_COEX_RX_TX |
(10) BLE_COEX_RX_TX |
0x0 |
Set the BLE_COEX_RX_TX interrupt as non-secure |
|
|
(9) BLE_COEX_IN_PROCESS |
(9) BLE_COEX_IN_PROCESS |
0x0 |
Set the BLE_COEX_IN_PROCESS interrupt as non-secure |
|
|
(8) BLE_ERROR |
(8) BLE_ERROR |
0x0 |
Set the BLE_ERROR interrupt as non-secure |
|
|
(7) BLE_FIFO |
(7) BLE_FIFO |
0x0 |
Set the BLE_FIFO interrupt as non-secure |
|
|
(6) BLE_HSLOT |
(6) BLE_HSLOT |
0x0 |
Set the BLE_HSLOT interrupt as non-secure |
|
|
(5) BLE_SLP |
(5) BLE_SLP |
0x0 |
Set the BLE_SLP interrupt as non-secure |
|
|
(4) BLE_CRYPT |
(4) BLE_CRYPT |
0x0 |
Set the BLE_CRYPT interrupt as non-secure |
|
|
(3) BLE_TIMESTAMP_TGT2 |
(3) BLE_TIMESTAMP_TGT2 |
0x0 |
Set the BLE_TIMESTAMP_TGT2 interrupt as non-secure |
|
|
(2) BLE_TIMESTAMP_TGT1 |
(2) BLE_TIMESTAMP_TGT1 |
0x0 |
Set the BLE_TIMESTAMP_TGT1 interrupt as non-secure |
|
|
(1) BLE_FINETGT |
(1) BLE_FINETGT |
0x0 |
Set the BLE_FINETGT interrupt as non-secure |
|
|
(0) BLE_SW |
(0) BLE_SW |
0x0 |
Set the BLE_SW interrupt as non-secure |
0xE000E400 |
NVIC_IPR0 |
(31:29) LSAD_MONITOR |
(31:29) LSAD_MONITOR |
0x0 |
Configure the LSAD_MONITOR interrupt priority |
|
|
(23:21) RTC_CLOCK |
(23:21) RTC_CLOCK |
0x0 |
Configure the RTC_CLOCK interrupt priority |
|
|
(15:13) RTC_ALARM |
(15:13) RTC_ALARM |
0x0 |
Configure the RTC_ALARM interrupt priority |
|
|
(7:5) WAKEUP |
(7:5) WAKEUP |
0x0 |
Configure the WAKEUP interrupt priority |
0xE000E404 |
NVIC_IPR1 |
(31:29) TIMER3 |
(31:29) TIMER3 |
0x0 |
Configure the TIMER3 interrupt priority |
|
|
(23:21) TIMER2 |
(23:21) TIMER2 |
0x0 |
Configure the TIMER2 interrupt priority |
|
|
(15:13) TIMER1 |
(15:13) TIMER1 |
0x0 |
Configure the TIMER1 interrupt priority |
|
|
(7:5) TIMER0 |
(7:5) TIMER0 |
0x0 |
Configure the TIMER0 interrupt priority |
0xE000E408 |
NVIC_IPR2 |
(31:29) GPIO2 |
(31:29) GPIO2 |
0x0 |
Configure the GPIO2 interrupt priority |
|
|
(23:21) GPIO1 |
(23:21) GPIO1 |
0x0 |
Configure the GPIO1 interrupt priority |
|
|
(15:13) GPIO0 |
(15:13) GPIO0 |
0x0 |
Configure the GPIO0 interrupt priority |
|
|
(7:5) FIFO |
(7:5) FIFO |
0x0 |
Configure the FIFO interrupt priority |
0xE000E40C |
NVIC_IPR3 |
(31:29) SPI0_TX |
(31:29) SPI0_TX |
0x0 |
Configure the SPI0_TX interrupt priority |
|
|
(23:21) SPI0_RX |
(23:21) SPI0_RX |
0x0 |
Configure the SPI0_RX interrupt priority |
|
|
(15:13) WATCHDOG |
(15:13) WATCHDOG |
0x0 |
Configure the WATCHDOG interrupt priority |
|
|
(7:5) GPIO3 |
(7:5) GPIO3 |
0x0 |
Configure the GPIO3 interrupt priority |
0xE000E410 |
NVIC_IPR4 |
(31:29) SPI1_COM |
(31:29) SPI1_COM |
0x0 |
Configure the SPI1_COM interrupt priority |
|
|
(23:21) SPI1_TX |
(23:21) SPI1_TX |
0x0 |
Configure the SPI1_TX interrupt priority |
|
|
(15:13) SPI1_RX |
(15:13) SPI1_RX |
0x0 |
Configure the SPI1_RX interrupt priority |
|
|
(7:5) SPI0_COM |
(7:5) SPI0_COM |
0x0 |
Configure the SPI0_COM interrupt priority |
0xE000E414 |
NVIC_IPR5 |
(31:29) UART0_TX |
(31:29) UART0_TX |
0x0 |
Configure the UART0_TX interrupt priority |
|
|
(23:21) UART0_RX |
(23:21) UART0_RX |
0x0 |
Configure the UART0_RX interrupt priority |
|
|
(15:13) I2C1 |
(15:13) I2C1 |
0x0 |
Configure the I2C1 interrupt priority |
|
|
(7:5) I2C0 |
(7:5) I2C0 |
0x0 |
Configure the I2C0 interrupt priority |
0xE000E418 |
NVIC_IPR6 |
(31:29) LIN0 |
(31:29) LIN0 |
0x0 |
Configure the LIN0 interrupt priority |
|
|
(23:21) PCM0_ERROR |
(23:21) PCM0_ERROR |
0x0 |
Configure the PCM0_ERROR interrupt priority |
|
|
(15:13) PCM0_RX_TX |
(15:13) PCM0_RX_TX |
0x0 |
Configure the PCM0_RX_TX interrupt priority |
|
|
(7:5) UART0_ERROR |
(7:5) UART0_ERROR |
0x0 |
Configure the UART0_ERROR interrupt priority |
0xE000E41C |
NVIC_IPR7 |
(31:29) ASCC_PHASE |
(31:29) ASCC_PHASE |
0x0 |
Configure the ASCC_PHASE interrupt priority |
|
|
(23:21) ASCC_PERIOD |
(23:21) ASCC_PERIOD |
0x0 |
Configure the ASCC_PERIOD interrupt priority |
|
|
(15:13) CC312 |
(15:13) CC312 |
0x0 |
Configure the CC312 interrupt priority |
|
|
(7:5) FPU |
(7:5) FPU |
0x0 |
Configure the FPU interrupt priority |
0xE000E420 |
NVIC_IPR8 |
(31:29) BLE_TIMESTAMP_TGT2 |
(31:29) BLE_TIMESTAMP_TGT2 |
0x0 |
Configure the BLE_TIMESTAMP_TGT2 interrupt priority |
|
|
(23:21) BLE_TIMESTAMP_TGT1 |
(23:21) BLE_TIMESTAMP_TGT1 |
0x0 |
Configure the BLE_TIMESTAMP_TGT1 interrupt priority |
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|
(15:13) BLE_FINETGT |
(15:13) BLE_FINETGT |
0x0 |
Configure the BLE_FINETGT interrupt priority |
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|
(7:5) BLE_SW |
(7:5) BLE_SW |
0x0 |
Configure the BLE_SW interrupt priority |
0xE000E424 |
NVIC_IPR9 |
(31:29) BLE_FIFO |
(31:29) BLE_FIFO |
0x0 |
Configure the BLE_FIFO interrupt priority |
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|
(23:21) BLE_HSLOT |
(23:21) BLE_HSLOT |
0x0 |
Configure the BLE_HSLOT interrupt priority |
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|
(15:13) BLE_SLP |
(15:13) BLE_SLP |
0x0 |
Configure the BLE_SLP interrupt priority |
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|
(7:5) BLE_CRYPT |
(7:5) BLE_CRYPT |
0x0 |
Configure the BLE_CRYPT interrupt priority |
0xE000E428 |
NVIC_IPR10 |
(31:29) TOF |
(31:29) TOF |
0x0 |
Configure the TOF interrupt priority |
|
|
(23:21) BLE_COEX_RX_TX |
(23:21) BLE_COEX_RX_TX |
0x0 |
Configure the BLE_COEX_RX_TX interrupt priority |
|
|
(15:13) BLE_COEX_IN_PROCESS |
(15:13) BLE_COEX_IN_PROCESS |
0x0 |
Configure the BLE_COEX_IN_PROCESS interrupt priority |
|
|
(7:5) BLE_ERROR |
(7:5) BLE_ERROR |
0x0 |
Configure the BLE_ERROR interrupt priority |
0xE000E42C |
NVIC_IPR11 |
(31:29) RF_SYNC |
(31:29) RF_SYNC |
0x0 |
Configure the RF_SYNC interrupt priority |
|
|
(23:21) RF_IRQ_RECEIVED |
(23:21) RF_IRQ_RECEIVED |
0x0 |
Configure the RF_IRQ_RECEIVED interrupt priority |
|
|
(15:13) RF_RXSTOP |
(15:13) RF_RXSTOP |
0x0 |
Configure the RF_RXSTOP interrupt priority |
|
|
(7:5) RF_TX |
(7:5) RF_TX |
0x0 |
Configure the RF_TX interrupt priority |
0xE000E430 |
NVIC_IPR12 |
(31:29) FLASH0_ECC |
(31:29) FLASH0_ECC |
0x0 |
Configure the FLASH0_ECC interrupt priority |
|
|
(23:21) FLASH0_COPY |
(23:21) FLASH0_COPY |
0x0 |
Configure the FLASH0_COPY interrupt priority |
|
|
(15:13) RF_RXFIFO |
(15:13) RF_RXFIFO |
0x0 |
Configure the RF_RXFIFO interrupt priority |
|
|
(7:5) RF_TXFIFO |
(7:5) RF_TXFIFO |
0x0 |
Configure the RF_TXFIFO interrupt priority |
0xE000E434 |
NVIC_IPR13 |
(31:29) ACCESS_ERROR |
(31:29) ACCESS_ERROR |
0x0 |
Configure the ACCESS_ERROR interrupt priority |
|
|
(23:21) DMA0 |
(23:21) DMA0 |
0x0 |
Configure the DMA0 interrupt priority |
|
|
(15:13) DMA1 |
(15:13) DMA1 |
0x0 |
Configure the DMA1 interrupt priority |
|
|
(7:5) DMA2 |
(7:5) DMA2 |
0x0 |
Configure the DMA2 interrupt priority |
0xE000E438 |
NVIC_IPR14 |
(7:5) DMA3 |
(7:5) DMA3 |
0x0 |
Configure the DMA3 interrupt priority |
0xE002E100 |
NVIC_ISER0_NS |
|
|
|
|
0xE002E104 |
NVIC_ISER1_NS |
|
|
|
|
0xE002E180 |
NVIC_ICER0_NS |
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|
|
0xE002E184 |
NVIC_ICER1_NS |
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|
|
0xE002E200 |
NVIC_ISPR0_NS |
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|
|
0xE002E204 |
NVIC_ISPR1_NS |
|
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|
0xE002E280 |
NVIC_ICPR0_NS |
|
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|
0xE002E284 |
NVIC_ICPR1_NS |
|
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|
0xE002E300 |
NVIC_IABR0_NS |
|
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0xE002E304 |
NVIC_IABR1_NS |
|
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|
0xE002E400 |
NVIC_IPR0_NS |
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|
0xE002E404 |
NVIC_IPR1_NS |
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|
0xE002E408 |
NVIC_IPR2_NS |
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|
0xE002E40C |
NVIC_IPR3_NS |
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|
0xE002E410 |
NVIC_IPR4_NS |
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0xE002E414 |
NVIC_IPR5_NS |
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0xE002E418 |
NVIC_IPR6_NS |
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|
0xE002E41C |
NVIC_IPR7_NS |
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0xE002E420 |
NVIC_IPR8_NS |
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0xE002E424 |
NVIC_IPR9_NS |
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0xE002E428 |
NVIC_IPR10_NS |
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0xE002E42C |
NVIC_IPR11_NS |
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|
0xE002E430 |
NVIC_IPR12_NS |
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|
0xE002E434 |
NVIC_IPR13_NS |
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|
0xE002E538 |
NVIC_IPR14_NS |
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