Direct Memory Access Macro Definition Documentation
SYS_DMA_CHANNELCONFIG
#define SYS_DMA_CHANNELCONFIG Sys_DMA_ChannelConfig(DMA, cfg, \ transferlength, counterInt, srcAddr, \ destAddr)
Location: dma.h:176
Parameters
Direction | Name | Description |
---|---|---|
in |
cfg |
Configuration of the DMA transfer behavior; use DMA_[LITTLE | BIG]_ENDIAN, [DEST | SRC]_TRANS_LENGTH_SEL, DMA_PRIORITY_[0 | 1 | 2 | 3], DMA_SRC_* DMA_DEST_* WORD_SIZE_*, DMA_SRC_ADDR_*, DMA_DEST_ADDR_*, DMA_SRC_ADDR_LSB_TOGGLE_[DISABLE | ENABLE], DMA_CNT_INT_[DISABLE | ENABLE], DMA_COMPLETE_INT_[DISABLE | ENABLE] |
in |
transferlength |
Configuration of the DMA transfer length |
in |
counterInt |
Configuration of when the counter interrupt will occur during the transfer |
in |
srcAddr |
Base source address for the DMA transfer |
in |
destAddr |
Base destination address for the DMA transfer |
Example Code for SYS_DMA_CHANNELCONFIG |
// Configure the default DMA channels for data transfer using a transfer length of 4 // and interrupting at the beginning of the transfer SYS_DMA_CHANNELCONFIG(DMA_BIG_ENDIAN | DEST_TRANS_LENGTH_SEL | DMA_PRIORITY_1 | DMA_CNT_INT_ENABLE, 4, 0, (uint32_t)0x2001ffc8, (uint32_t)0x2001ffb8); |
SYS_DMA_MODE_ENABLE
#define SYS_DMA_MODE_ENABLE Sys_DMA_Mode_Enable(DMA, (mode))
Location: dma.h:191
Parameters
Direction | Name | Description |
---|---|---|
in |
mode |
Enable mode of operation of the DMA Channel; use DMA_[DISABLE | ENABLE | DMA_ENABLE_WRAP | DMA_ENABLE_WRAP_RESTART | DMA_TRIGGER DMA_TRIGGER_WRAP | DMA_TRIGGER_WRAP_RESTART] |
Example Code for SYS_DMA_MODE_ENABLE |
// Enable the default DMA block SYS_DMA_MODE_ENABLE(DMA_ENABLE); |