SPI Function Documentation

 

Sys_SPI_Config

void Sys_SPI_Config(SPI_Type * spi, uint32_t config)

 

Configure the specified SPI interface's operation and controller information.

 

Location: spi.h:109

 

Parameters

Direction Name Description

in

spi

Pointer to the SPI instance

in

config

Interface operation configuration; use SPI_SELECT_[MASTER | SLAVE], SPI_CLK_POLARITY_[NORMAL | INVERSE], SPI_PRESCALE_*, SPI_WORD_SIZE_*, SPI_MODE_[SPI | DSPI | QSPI] SPI_UNDERRUN_INT_[ENABLE | DISABLE], SPI_OVERRRUN_INT_[ENABLE | DISABLE], SPI_CS_RISE_INT_[ENABLE | DISABLE], SPI_RX_INT_[ENABLE | DISABLE] SPI_TX_INT_[ENABLE | DISABLE] SPI_RX_DMA_[ENABLE | DISABLE] SPI_TX_DMA_[ENABLE | DISABLE]

 

 

Example Code for Sys_SPI_Config

    // Configure the SPI interface's operation and controller information:

    //  - Master mode

    //  - Use 8-bit words

    //  - Select interrupts enabled

    //  - Prescale the SPI interface clock by 32

    Sys_SPI_Config(SPI, SPI_SELECT_MASTER | SPI_WORD_SIZE_8 | SPI_TX_START_INT_ENABLE |

                   SPI_RX_INT_ENABLE | SPI_OVERRUN_INT_ENABLE |

                   SPI_PRESCALE_32 | SPI_UNDERRUN_INT_ENABLE);

 

Sys_SPI_TransferConfig

void Sys_SPI_TransferConfig(SPI_Type * spi, uint32_t config)

 

Configure the SPI transfer information for the specified SPI instance.

 

Location: spi.h:132

 

Parameters

Direction Name Description

in

spi

Pointer to the SPI instance

in

config

Interface transfer configuration; use SPI_ENABLE, SPI_DISABLE, SPI_RESET, SPI_START, SPI_MODE_READ_WRITE, SPI_MODE_READ, SPI_MODE_WRITE, SPI_MODE_NOP, SPI_CS_0, SPI_CS_1,

 

 

Example Code for Sys_SPI_TransferConfig

    // Enable and configure the SPI interface to read operation mode

    Sys_SPI_TransferConfig(SPI, SPI_ENABLE | SPI_MODE_READ);

 

Sys_SPI_Read

uint32_t Sys_SPI_Read(const SPI_Type * spi)

 

Generate clock and CS to read data from SPI interface.

 

Location: spi.h:147

 

Parameters

Direction Name Description

in

spi

Pointer to the SPI instance

 


Return


data Data read from the SPI interface

 

Assumptions

SPI is configured as master mode and transfer operation mode is SPI_MODE_READ_WRITE(full duplex) or (SPI_MODE_READ) half duplex

 

Example Code for Sys_SPI_Read

    // Generate clock and CS to read data from SPI interface

    Sys_SPI_Read(SPI);

 

Sys_SPI_Write

void Sys_SPI_Write(SPI_Type * spi, uint32_t data)

 

Generate clock and CS to write data to SPI interface.

 

Location: spi.h:162

 

Parameters

Direction Name Description

in

spi

Pointer to the SPI instance

in

data

Data to be sent over SPI

 

Assumptions

SPI is configured as master mode and transfer operation mode is SPI_MODE_READ_WRITE(full duplex) or (SPI_MODE_WRITE) half duplex

 

Example Code for Sys_SPI_Write

    // Generate clock and CS to write data to SPI interface

    Sys_SPI_Write(SPI, 0xFF);

 

Sys_SPI_GPIOConfig

void Sys_SPI_GPIOConfig(const SPI_Type * spi, uint32_t slave, uint32_t cfg, uint32_t clk, uint32_t cs, uint32_t seri, uint32_t sero)

 

Configure four GPIOs for the specified SPI interface.

 

Location: spi.h:181

 

Parameters

Direction Name Description

in

spi

Pointer to the SPI instance

in

slave

SPI master/slave configuration; use SPI*_SELECT_[MASTER | SLAVE]

in

cfg

GPIO pin configuration for the SPI pads

in

clk

GPIO to use as the SPI clock pad

in

cs

GPIO to use as the SPI chip select pad

in

seri

GPIO to use as the SPI serial input pad

in

sero

GPIO to use as the SPI serial output pad

 

 

Example Code for Sys_SPI_GPIOConfig

    // Configure GPIOs 0, 1, 2, and 3 for the SPI0 interface with

    // low-pass filter disabled, 8X drive-strength, and 1 kOhm pull-up resistors

    Sys_SPI_GPIOConfig(SPI, GPIO0, (GPIO_LPF_DISABLE | GPIO_8X_DRIVE |

                      GPIO_1K_PULL_UP), GPIO0GPIO1GPIO2GPIO3);

 

Sys_DSPI_GPIOConfig

void Sys_DSPI_GPIOConfig(const SPI_Type * spi, uint32_t cfg, uint32_t clk, uint32_t cs, uint32_t io0, uint32_t io1)

 

Configure four GPIOs for the specified SPI interface.

 

Location: spi.h:265

 

Parameters

Direction Name Description

in

spi

Pointer to the SPI instance

in

cfg

GPIO pin configuration for the SPI pads

in

clk

GPIO to use as the DSPI clock pad

in

cs

GPIO to use as the DSPI chip select pad

in

io0

GPIO to use as the DSPI io0

in

io1

GPIO to use as the DSPI io1

 

 

Example Code for Sys_DSPI_GPIOConfig

    // Configure GPIOs 0, 1, 2, and 3 for the DSPI0 interface with

    // low-pass filter disabled, 8X drive-strength, and 1 kOhm pull-up resistors

    Sys_DSPI_GPIOConfig(SPI, (GPIO_LPF_DISABLE | GPIO_8X_DRIVE |

                       GPIO_1K_PULL_UP), GPIO0GPIO1GPIO2GPIO3);

 

Sys_QSPI_GPIOConfig

void Sys_QSPI_GPIOConfig(const SPI_Type * spi, uint32_t cfg, uint32_t clk, uint32_t cs, uint32_t io0, uint32_t io1, uint32_t io2, uint32_t io3)

 

Configure six GPIOs for the specified SPI interface.

 

Location: spi.h:297

 

Parameters

Direction Name Description

in

spi

Pointer to the SPI instance

in

cfg

GPIO pin configuration for the SPI pads

in

clk

GPIO to use as the QSPI clock pad

in

cs

GPIO to use as the QSPI chip select pad

in

io0

GPIO to use as the QSPI io0

in

io1

GPIO to use as the QSPI io1

in

io2

GPIO to use as the QSPI io2

in

io3

GPIO to use as the QSPI io3

 

 

Example Code for Sys_QSPI_GPIOConfig

    // Configure GPIOs 0, 1, 2, 3, 4, and 5 for the QSPI0 interface with

    // low-pass filter disabled, 8X drive-strength, and 1 kOhm pull-up resistors

    Sys_QSPI_GPIOConfig(SPI, (GPIO_LPF_DISABLE | GPIO_8X_DRIVE | GPIO_1K_PULL_UP),

                       GPIO0GPIO1GPIO2GPIO3GPIO4GPIO5);