RF_REG2D

Bit Field

Read/Write

Field Name

Description

29:28

RW

PA_CONF_SW_CN

Harmonic 2 notch tuning

27

RW

PA_CONF_TX_SWITCHPA

Switch PA

26

RW

PA_CONF_TX_0DBM

Select between PPA and PA

25

RW

PA_CONF_LIN_RAMP

PA ramp-up linearization

24

RW

PA_CONF_MIN_PA_PWR

Set the minimum power during the PA ramp-up

23

RW

CTRL_RX_SWITCH_LP

Switch the low-pass filter in the Rx chain

22

RW

CTRL_RX_USE_PEAK_DETECTOR

Peak detector powering

21

RW

CTRL_RX_START_MIX_ON_CAL

Mixer enabling

20:16

RW

CTRL_RX_CTRL_RX

Rx control

15

RW

CTRL_ADC_PHADC_THERM_OUT_EN

Enable the buffers of phase ADC thermometric code (banked)

14:13

RW

CTRL_ADC_PHADC_DELLATCH

Phase ADC delay latch trimming (banked)

12:8

RW

CTRL_ADC_CTRL_ADC

Phase ADC control (banked)

6:5

RW

RSSI_TUN_2_RSSI_TRI_CK_DIV

Speed on the RSSI triangular dithering signal (cf reg RSSI_TUN)

4

RW

RSSI_TUN_2_RSSI_ONE_CK_RSSI_PHADC

RSSI and phase ADC clocks sharing

3

RW

RSSI_TUN_2_RSSI_FULL

RSSI full scale

2

RW

RSSI_TUN_2_RSSI_1DB

LSB resolution

1:0

RW

RSSI_TUN_2_RSSI_PRE_ATT

Pre attenuation of the RSSI signal

Bit Field

Field Name

Value Symbol

Value Description

Hex Value

29:28

PA_CONF_SW_CN

PA_CONF_SW_CN_DEFAULT

0x0*

27

PA_CONF_TX_SWITCHPA

PA_CONF_TX_SWITCHPA_DISABLE

RF Tx timing

0x0*

PA_CONF_TX_SWITCHPA_ENABLE

Enable the PA only with the digital block

0x1

26

PA_CONF_TX_0DBM

PA_CONF_TX_DISABLEDBM_DISABLE

Only use the PPA is used (-20dBm)

0x0

PA_CONF_TX_DISABLEDBM_ENABLE

Enable the PA

0x1*

25

PA_CONF_LIN_RAMP

PA_CONF_LIN_RAMP_DISABLE

Don't linearize the PA ramp-up by having not equal ramp-up step delays

0x0*

PA_CONF_LIN_RAMP_ENABLE

Linearize the PA ramp-up by having not equal ramp-up step delays

0x1

24

PA_CONF_MIN_PA_PWR

PA_CONF_MIN_PA_PWR_M3

The ramp-up starts at -3

0x0

PA_CONF_MIN_PA_PWR_M1

The ramp-up starts at -1

0x1*

23

CTRL_RX_SWITCH_LP

CTRL_RX_SWITCH_LP_DISABLE

Do not switch the low-pass filter in the Rx chain

0x0*

CTRL_RX_SWITCH_LP_ENABLE

Switch the low-pass filter in the Rx chain

0x1

22

CTRL_RX_USE_PEAK_DETECTOR

CTRL_RX_USE_PEAK_DETECTOR_DISABLE

The peak detector is not powered on during the Rx by the FSM

0x0

CTRL_RX_USE_PEAK_DETECTOR_ENABLE

The peak detector is powered on during the Rx by the FSM

0x1*

21

CTRL_RX_START_MIX_ON_CAL

CTRL_RX_START_MIX_ON_CAL_DISABLE

The mixer is disabled during the sub-band selection phase

0x0*

CTRL_RX_START_MIX_ON_CAL_ENABLE

The mixer is enabled during the sub-band selection phase

0x1

20:16

CTRL_RX_CTRL_RX

CTRL_RX_CTRL_RX_DEFAULT

Rx control

0xF*

15

CTRL_ADC_PHADC_THERM_OUT_EN

CTRL_ADC_PHADC_THERM_OUT_EN_DISABLE

Disable thermometric code

0x0

CTRL_ADC_PHADC_THERM_OUT_EN_ENABLE

Enable thermometric code

0x1*

14:13

CTRL_ADC_PHADC_DELLATCH

CTRL_ADC_PHADC_DELLATCH_DEFAULT

0x1*

12:8

CTRL_ADC_CTRL_ADC

CTRL_ADC_CTRL_ADC_DEFAULT

bits(1:0) => phase ADC reset delay, bits(3:2) phase ADC clock delay, bit(4) phase ADC latch idle

0x5*

6:5

RSSI_TUN_2_RSSI_TRI_CK_DIV

RSSI_TUN_2_RSSI_TRI_CK_DIV_2

2 RSSI clk periods

0x0*

RSSI_TUN_2_RSSI_TRI_CK_DIV_4

4 RSSI clk periods

0x1

RSSI_TUN_2_RSSI_TRI_CK_DIV_8

8 RSSI clk periods

0x2

RSSI_TUN_2_RSSI_TRI_CK_DIV_16

16 RSSI clk periods

0x3

4

RSSI_TUN_2_RSSI_ONE_CK_RSSI_PHADC

RSSI_TUN_2_RSSI_ONE_CK_RSSI_PHADC_DISABLE

RSSI and the phase ADC don't share the same clock

0x0*

RSSI_TUN_2_RSSI_ONE_CK_RSSI_PHADC_ENABLE

RSSI and the phase ADC share the same clock

0x1

3

RSSI_TUN_2_RSSI_FULL

RSSI_TUN_2_RSSI_FULL_DISABLE

RSSI full scale is not used

0x0

RSSI_TUN_2_RSSI_FULL_ENABLE

RSSI full scale is used (10bits)

0x1*

2

RSSI_TUN_2_RSSI_1DB

RSSI_TUN_2_RSSI_1DB_0P5

LSB is 0.5dB

0x0*

RSSI_TUN_2_RSSI_1DB_1

LSB is 1dB

0x1

1:0

RSSI_TUN_2_RSSI_PRE_ATT

RSSI_TUN_2_RSSI_PRE_ATT_DEFAULT

0x3*